The S5l module is a trigger processor module, this means that it can take two triggers as inputs and perform logic functions on them. These functions are performed by a CPLD which is programmed to house multiple functions. The user can select by software or a hardware switch which function should be performed on the inputs. Other uses of the module can be: a trigger splitter/buffer from 1:4 and as a buffer to get a 50 Ohm output from a high impedance source.
The image shows a block diagram of the inner workings of the module.
As can be seen in the figure, the input impedance can be set to 50 Ohm by a jumper. If the jumper is not set, the input impedance is 10k Ohm. At the input there is a comparator which decides if the input is high or low. The reference voltage of the comparator is set by a DAC which can be configured to a couple of levels by the user.
This section describes the logic functions present in the CPLD and how to set them. It also shows which bits on the header or in the software communication control the function selection, and which bits control the DAC comparator voltage.
The image below shows the bits that configure the functionality of the unit. These can be set by a switch in the unit or via software, depending on situation. The two MSB bits (bit 6 and 7) determine the DAC setting, the lower 6 bits are for selecting the trigger functionality. Of these, the lower 5 bits select the functionality and bit 5 inverts the output of the function selected.
The DAC setting determines the threshold voltage for both input A and input B: this is the voltage that needs to be crossed before the input is considered ‘high’. These thresholds are independent of the input impedance of the channels.
|Threshold (V)||Bit value (Dec)||Bit value (bin)|
The table below shows all the logic functions that are currently implemented in the CPLD. As we are using 5 bit to select the function, we have at maximum 32 functions to implement. Since we are not there yet, requests can be made for new functionality.
|Function||Bit value (Dec)||Bit value (bin)||Description|
|A or B||0||00000||A or B will toggle output high|
|A and B||1||00001||A and B both have to be high to toggle the output high|
|A xor B||2||00010||Exclusive or on A and B: only output high when inputs are different|
|(not A) or B||3||00011||Inverts input A, then or with B|
|A or (not B)||4||00100||Inverts input B, then or with A|
|(not A) and B||5||00101||Inverts input A, then and with B|
|A and (not B)||6||00110||Inverts input B, then and with B|
|(not A) xor B||7||00111||Inverts input A, then xor with B|
|A xor (not B)||8||01000||Inverts input B, then xor with A|
|Impedance||50||Ω||With jumper present at the termination resistor|
|Comparator Threshold||0.4||V||Threshold can be set to these levels either via an internal switch or by software|
|Maximum Repetition Rate||120||MHz|
|Minimum Pulse Width||2||ns|
|Voltage||2.5||V||In 50Ω load|
|Rise Time||640||ps||10% to 90%|
|Fall Time||390||ps||10% to 90%|
|Throughput delay||15.5 ± 0.2||ns||Variation due to output buffers and logic function selected|
|Additive Jitter||4||ps RMS|