S5l - Trigger Processor


Description

The S5l module is a trigger processor module, this means that it can take two triggers as inputs and perform logic functions on them. These functions are performed by a CPLD which is programmed to house multiple functions. The user can select by software or a hardware switch which function should be performed on the inputs. Other uses of the module can be: a trigger splitter/buffer from 1:4 and as a buffer to get a 50 Ohm output from a high impedance source.

The image shows a block diagram of the inner workings of the module.

F1d block diagram

As can be seen in the figure, the input impedance can be set to 50 Ohm by a jumper. If the jumper is not set, the input impedance is 10k Ohm. At the input there is a comparator which decides if the input is high or low. The reference voltage of the comparator is set by a DAC which can be configured to a couple of levels by the user.

Logic functions

This section describes the logic functions present in the CPLD and how to set them. It also shows which bits on the header or in the software communication control the function selection, and which bits control the DAC comparator voltage.

Click here to show the explanation...

Specifications

Parameter Value Units Conditions
Input Characteristics
Impedance 50 With jumper present at the termination resistor
10k Without jumper
Comparator Threshold 0.4 V Threshold can be set to these levels either via an internal switch or by software
0.8 V
1.6 V
2.5 V
Maximum Repetition Rate 120 MHz
Minimum Pulse Width 2 ns
Output Characteristics
Impedance 50
Voltage 2.5 V In 50Ω load
Rise Time 640 ps 10% to 90%
Fall Time 390 ps 10% to 90%
Performance
Throughput delay 15.5 ± 0.2 ns Variation due to output buffers and logic function selected
Additive Jitter 4 ps RMS