The D4 module contains 2 individual 24-bit ADCs (Analog to Digital Converters) with an input range of ±4V and a data rate ranging from 1.7 Hz to 83 kHz. As it is designed as alternative to Keithley DMMs, it offers similar or better performance in terms of noise, resolution, temperature drift, INL and 50 Hz rejection. For details, see specifications.
As can be seen in the diagram below, the ADCs are two separate units: they operate independently. This means they are able to run at different sample rates and can be triggered separately. So one D4 module could replace two Keithley DMMs.
The ADCs inside the module are equipped with two built in digital filters: a Sinc3 filter and a Sinc5+Sinc1 filter. These filters determine to a large extent the performance of the module. By changing the filter setting, the user sets the Data Rate, Resolution, Bandwidth and the 50 Hz rejection. The table below shows three settings of the Sinc3 filter as an example. Which filter and which setting should be chosen depends on the use case.
|Filter Setting||Data Rate||Resolution (bits)||Bandwidth||50Hz Rejection|
|4||10.5 kSPS||18.3||8.5 kHz||-0.1 mdB|
|12||133 SPS||21.8||105 Hz||-0.6 dB|
|18||5.56 SPS||24||4.4 Hz||-101 dB|
For a complete list of filter types and settings, see the
D4_Filter.xlsx file below.
|Resolution||500||nV||At 5.5 SPS: the resolution is highly filter dependent. See `D4_Filter.xlsx` for the full list of settings|
|1.2||mV||At 83 kSPS|
|Data rate||1.67 - 83000||SPS||These data rates are filter dependent. They change the settling time, resolution, bandwidth and 50 Hz rejection.|
|INL||±3||ppm of FSR||Without software compensation|
|±1.25||ppm of FSR||With software compensation|
|50 Hz rejection||100||dB||At 5.5 SPS|