|| D5, BiasDAC
This module contains 8 (optional 16) 16bit DACs mainly for creating gate-voltages to control the sample. To protect the sample the polarity of the DACs can be manually fixed. Contrary to commercial units their are no processors or clock circuits in this module , this to prevent interference. Each group of 4 DACs has a polarity switch on the front. DAC values are set via a fibre and an interfacebox connected to the user PC (comport). A Labview VI offers acces to the PC-interface. The data LED lights up when a PC-message is received via the fibre.
The pictures shows a (first version) 8DAC module with 16DAC option.
The DAC-output signals leave this module and go to the Summing module (S2). In this module the user can place additional summing, filtering and dividing for the BiasDAC-voltages. The DAC output signals are available at the (lemo/mcx) connectors on the front. From there they can be patched to the cryostat matrix unit. A second use for (some) BiasDACS can be to control source-modules enabling direct PC-control instead of the analog control via the iso-amps. This can also be patched in module S2.
The BiasDACs default have a common ground being the main-battery supply. As an option there can be a seperate input on the back for a D5 supply-battery and then usually DACs 9..16 are powered by this.
It is also possible to use an ISO-Voltage-Source (S1..) to isolate one DAC, this can be set in the Summing module (S2).
The output voltage range of the DACs is 0..4V , 0..-4V, -2..+2V depending on the setting of the polarity switch. The DAC values to send remain 0..65535 (16bit) ,the corresponding output voltage can be determined by observing the polarity switch status.
Noise and drift are very low (measured 5uVpp in 1 hour)
A higher output voltage can be obtained by using an Iso-Voltage Source (S1c, 100V)(S1d,+/-8V) or S1f ( 8chan +/-10V).
It is important to notice that the output voltage CHANGES (up to 8V) when the polarity switch is operated, this is also why polarity can not be software controlled to prevent errors destroying the sample.
The second design (lower picture) has an "emergency switch" that smoothly ramps all dacs to zero (5..10seconds ramp) . In case the computer or microcontroller should loose power or the user software crashes the local DAC-memory in D5 will stay in the last setting but the user might not now this setting anymore. In that situation the switch can be used to ramp all the gates to zero. The DAC-memory still needs to be cleared to zero volts before starting up again !!
Putting the ramp switch back to "on" can ONLY be done if the DACs are cleared otherwise the output will JUMP to the previous value.
The "emergency switch" has a mechanical lock (pull lever before operating) to prevent accidental switching.
Option bit control (preliminairy):
Apart from the normal use (controlling DACs) the receiver part of this module has max. 12 additional individual logic outputs to control/switch parameters (while still controlling up to 16 DACs). Firmware in the RS232 control box needs to be at least V1.4. Additional wiring in the D5 module and backplane can be needed. set individual bits VI screen
Leaving out the DACs the interface could be used to control up to 32 logic lines.
| Fibre (FSMA-connectors)
used to interconnect the BiasDAC module and the "BiasDAC-control" PC-interface
manufacturer:Fibre Data, 250um core (Farnell)
| PC-interfacebox BiasDAC-control
a microcontroller interfacing with the PC using the serial port. Use a "null modem cable" to connect. For using the optional bitcontrol the firmware version should mention at least :"V1.4"
download vi's for labview7.1 (including optional bit control)
view link dataformat description (non-labview-users)
| dc-supply for the PC-interface
standard wallwart supply 9V-dc RCA connector, tip=+9V